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    <journal>
        <name>International Journal of Research and Development in Engineering Sciences</name>
        <website>https://www.ijrdes.com</website>
    </journal>

    <metadata>
        <title>64 - BIT Implementation of SPI AMD I2C Protocols Using VERILOG HDL</title>

        <authors>
			<author><name>P Gangadhara Reddy</name><name>G M Anasuya</name><name>N Umamaheswar Reddy</name><name>K Sai Charan</name><name>B Subramani Pavan</name><name>N Ramesh</name>     </author>
        </authors>

        <volume>6</volume>
        <issue>4 (July - August)</issue>

        <publication>
            <year>1970</year>
			<month>01</month>
			
			<period>July-August</period>
        </publication>

		<language>en</language><keywords><keyword>SPI</keyword><keyword>I2C</keyword><keyword>Master & Slave</keyword><keyword>SDL</keyword><keyword>SCL</keyword><keyword>Parameter N</keyword><keyword>Flexibility</keyword><keyword>Clock Gating Techniques</keyword><keyword>State Machine</keyword></keywords> 
    </metadata>

    <abstract>The InterIntegrated Circuit I2C protocol is a versatile communication standard used in embedded systems and integrated circuits Two bidirectional lines are present in it a serial clock line SCL and a serial data line SDA Its design is masterslave In order to offer flexibility in data transfer the number of bytes to be sent or received is chosen using the parameter N The Serial Peripheral Interface SPI protocol which makes use of a clock gating mechanism is another efficient communication standard It enables fullduplex highspeed data exchange between several slave devices and a master device Clock gating is a mechanism that selectively enables and disables clock signals to individual blocks or components hence optimising power consumption The parameter N is utilised in both SPI and I2C to choose how many bytes are delivered or received As a result the number of bytes transported can be varied and the operation can adapt since data transfer control is handled by a state machine </abstract>

    <copyright>
        <statement>
            Copyright (c) 2026 International Journal of Research and Development in Engineering Sciences. All rights reserved.
        </statement>
        
            <year>1970</year>
        <license>All Rights Reserved</license>
    </copyright>

</article>
