Improved Multicarrier PWM Technique for Harmonic Reduction by Using APOD method for Cascaded H-bridge DC/AC Converters

Abstract

Conventional modulation techniques used in cascaded H-bridge multilevel (CHB) DC/AC converters often spawn the noticeable quantity of harmonics of low frequency in an output voltage. The latter usually leads to a high-peak output current, impacting adversely on performance and reliability of industrial motor drive systems. To tackle these drawbacks, this research develops an improved Multicarrier Pulse-Width Modulation (MCPWM) method based on an alternative Phase Opposition Disposition (APOD) approach. A proposed MCPWM method significantly mitigates harmonic content in an output AC voltage by keeping the continuous output current with reduced peak magnitude. A harmonic mitigation algorithm is presented, which dynamically modifies switching frequency and modulation index of semiconductor devices based on a switching angles of a MCPWM pulse. An algorithm specially deals with a 5th, 7th and 11th-order harmonics and reveals a novel range of switching angles, at which their amplitudes become minimal. One of the significant achievements of this work is the development of a novel real-time switching angle estimation technique which avoids solving complex nonlinear equations. This approach reduces not only computation time but also hardware complexity, hence making medium-capacity FPG an implementation viable. A proposed technique is authenticated by theoretical analysis, MATLAB/Simulink simulations, and exploratory verification using the three-phase FPGA-based CHB multilevel inverter prototype. Comparative analysis against state-of-the-art techniques will reveal superior efficacy of a proposed technique in terms of harmonic suppression, computational efficiency, and hardware simplicity, thus making it a practical solution for industrial power electronics applications.